Share
تصميم مضاعف تناظري خطي محسن بنطاق واسع يعمل باربعة ارباع == Design Of Improved Wideband Linear Four Quadrant Analog Multiplier
Author name:
رسل صلاح خضير
Supervisor name:
عبد الكريم مخيف عبيس
General topic:
Electrical, Electronic and Communications Engineering
Specific topic:
Electronics and Communications Engineering
Degree:
Master
University:
University of Babylon - College Of Engineering - Department Of Electrical Engineering
Language:
English
University location:
Babylon
First pages:
34T547 - p.pdf
Abstract:
استخدمت المضاعفات التناظرية على نطاق واسع في دوائر الاتصالات والشبكات العصبية ككاشفات للطور ومضاعفات للتردد ودوائر لمزج الاشارات والتضمين وفك التضمين. في التطبيقات التقليدية مثل دوائرالتضمين تعتبر ترددات التشغيل والسلوك الخطي للانظمة والمديات المسموح بها | Analog multipliers have been widely exploited in communication circuitries, phase detectors, neural networks, frequency multipliers, mixers, and modulation and demodulation circuits. In conventional applications, such as modulation circuits, the linearity, frequency of operation, and input voltage ranges are issues of great importance for multipliers. This work targeted these issues through the design of two types of four quadrant analog multipliers operating in wideband frequency ranges and having very high linearity with input and output voltage ranges of ±10V.The first wideband four - quadrant analog multiplier is designed using wideband squaring and operational amplifier (OPAMP) circuits. The wideband OPAMP is designed using 10 NMOS transistors based on 0.35 µm NMOS technology with supply voltages of ?12V. The wideband OPAMP has exhibited an open loop voltage gain of 3336545. The squaring circuit is built using two NMOS transistors and two wideband OPAMPs. The first wideband multiplier is built using two identical squaring circuits, two difference amplifiers, and one summing amplifier. It is characterized by high input - output linearity range of - 10 V to +10 V for both inputs, ±10 V input and output voltage ranges, and cutoff frequency of about 5 GHz. The second wideband four quadrant analog multiplier is designed using NPN bipolar junction transistors. It is built with two main circuits, which are the multiplier cell and the output circuit. The multiplier cell is built using a modified Gilbert multiplier, while the output circuit is a high gain circuit designed for changing the differential output of the multiplier cell to a single output having a voltage range of ±10 V. The multiplier circuit is designed with supply voltages of ?12 V. It is characterized by high input - output linearity range of - 10 V to +10 V for both inputs, ±10 V input and output voltage ranges, and cutoff frequency of about 1 GHz.Both multipliers are designed and tested on PSpice in ORCAD / Version 16.6.
